About Aurora




SPARC Processor Cores




The AU-C02XX 32 Bit Tiny, Low Power SPARC Processor Cores are a family of small, low power 32 bit SPARC processor cores targeted at embedded controller, wireless, and other portable applications. They are ideal for embedded applications that have outgrown 8 and 16 bit controllers and therefore want to move up to a 32 bit controller. For lowest power and smallest gate count, each processor of this family of processor cores, includes the base processor and a combination of any of a) caches, b) MMU, and/or c) floating point. The user selects the processor from this processor family that has only users required functionality, and therefore does not waste area or power on unnecessary functions. The AU-C02XX Processor Cores are available as synthesizable Verilog models from Aurora VLSI, Inc. Contact CustomerService@auroravlsi.com.

AU-C02XX Processor Core features are summarized:

  • Low gate count
  • Low power
  • High clock rate- 300/500MHz in worst case slow/typical .13u conditions
  • Modular architecture- Basic Processor Core, Cache Unit, MMU, FPU

Basic Processor Core

  • 20K 25K gates
  • 32 bit SPARC instruction set
  • Good performance- 240/400 Dhrystone 2.1 at 300/500MHz (predicted)
  • Coprocessor port for an optional user defined coprocessor
  • Interrupt interface

Cache Unit

  • Separate instruction and data cache
  • Sizes are configurable from 256 bytes to 8Kbytes each
  • Separate instruction and data high bandwidth memory interfaces- 4 bytes/cycle peak

Memory Management Unit (MMU)

  • SPARC Reference MMU
  • Simultaneous instruction and data virtual address translation for high performance
  • 4K byte page size
  • TLB- 32 or 64 entries (configurable)

Floating Point Unit (FPU)

  • IEEE754-1985 floating point
  • Single and double precision


SPARC is a trademark of SPARC International, Inc.


SPARC Processor Cores


Basic processor only


Basic processor + caches


Basic processor + caches + MMU


Basic processor + floating point


Basic processor + caches + floating point


Basic processor + caches + MMU + floating point


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